IEEE P1500 IEEE Draft Standard Testability Method for Embedded Core-based Integrated Circuits

standard by IEEE,

Full Description

Scope

IEEE Std 1500 is a standard design-for-testability method for integrated circuits (ICs) containing embedded nonmergeable cores. This method is independent of the underlying functionality of the IC or its individual embedded cores. The method supports the necessary requirements for the test of such ICs, while allowing for ease of interoperability of cores that may have originated from different sources. This method is usable for all classes of digital cores, including hierarchical cores.

Purpose

The aim of IEEE Std 1500 is to provide a consistent scalable solution to the test reuse challenges specific to the reuse of nonmergeable cores, while preserving the IP aspects that are often associated with these cores. This objective is achieved through provision of a core-centric methodology that enables successful integration of cores into SoCs.

Abstract

Revision Standard - Active - Draft.This standard defines a mechanism for the test of core designs within a system on chip (SoC). This mechanism constitutes a hardware architecture and leverages the core test language (CTL) to facilitate communication between core designers and core integrators.

Product Details

ISBN(s): 9781504481335 Number of Pages: 154 File Size: 1 file , 3.4 MB Product Code(s): STDUD25067